The present invention relates to hysteresis circuits and, more particularly, to a precision hysteresis circuit for introducing hysteresis into a comparator circuit.
Comparators are widely used in a variety of electronic equipment to compare differential input signals applied thereto to provide differential digital output signals. The output signals will change voltage level states depending upon which of the inputs of the comparator is the higher. Adding hysteresis offset is required in many applications to provide noise immunity and to prevent the outputs from "chattering" when the inputs to the comparator hover near the threshold of the comparator.
In addition, several programmable levels of hysteresis may be made available to the user in his application of the comparator. These levels of programmable hysteresis may also be tightly toleranced over temperature variations and process variations if the comparators are manufactured in integrated circuit form. Further, the comparator having hysteresis may be required for use in a switch capacitor programmable analog array which requires the comparator and the hysteresis producing circuit to run at high switching frequencies wherein the comparator is operated on reset and comparison cycles.
One known method of introducing hysteresis is to steer a small current into one load of the differential comparator during the comparison cycle. This results in an output directional offset which would have to be overcome by the next set of inputs applied to the comparator. One disadvantage of this scheme when using a fixed amount of injection current is variation of the resulting offset due to device variations of the comparator caused by process variations in the manufacture of integrated circuits and with temperature variations.
Hence, a need exists for a comparator for use in a switched applications having programmable hysteresis in which the hysteresis can be maintained to a tight tolerance over temperature and integrated circuit process variations.